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The RF Analog Layout Engineer will create and optimize physical layouts for RF and analog integrated circuits using advanced FinFET technology. Requirements typically include a degree in electrical or electronics engineering, practical experience with analog/RF IC layout, and familiarity with CMOS or FinFET processes, layout-versus-schematic checks, design-rule checks, parasitic extraction, and Cadence or comparable EDA tools. Candidates should understand matching, shielding, common-centroid techniques, noise isolation, and high-frequency layout practices. Attention to detail, effective communication, and the ability to work closely with circuit designers, process engineers, and verification teams are expected. Experience with tape-out projects and multinational engineering environments would be advantageous.
Capgemini is a global business and technology services company headquartered in France, operating across consulting, engineering, digital transformation, cloud, data, cybersecurity, and managed services. It serves clients in industries such as financial services, manufacturing, telecommunications, automotive, healthcare, and consumer products. The company combines strategy, technology implementation, engineering expertise, and operational support to help organizations modernize their businesses. Capgemini has a substantial international workforce and often delivers projects through distributed, multicultural teams. In Malaysia, its presence includes technology delivery, consulting, application services, engineering, and support functions. Employees may work with regional or global clients and gain exposure to structured delivery methods, enterprise technologies, and cross-border collaboration. The exact responsibilities, benefits, and working arrangements for this semiconductor-related position should be confirmed with the local recruiting team.
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